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169
src/cpu.c
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169
src/cpu.c
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/* cpu.c
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*
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* Copyright (C) 2012,2014-2015 Henrik Hautakoski <henrik.hautakoski@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include <stdlib.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <unistd.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <errno.h>
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#include "cpu.h"
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#include "mm.h"
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#include "syscall.h"
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#include "instr.h"
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// Registers r0, r15
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int16_t reg[16] = { 0 };
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/* Program */
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unsigned char *instr_mem = NULL;
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unsigned long instr_cnt = 0;
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/* Program counter */
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uint16_t pc = 0;
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/* CPU flags */
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#define CPU_FLAGS_HALT (1<<0)
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unsigned char cpu_flags = CPU_FLAGS_HALT;
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#define debug(...) fprintf(stderr, __VA_ARGS__)
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static void execute(struct instr *instr) {
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switch(instr->opcode) {
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case OP_NOOP :
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debug("noop\n");
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/* Do nothing */
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break;
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case OP_ADD :
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debug("add\tr%i r%i r%i\n", instr->r.rs, instr->r.r0, instr->r.r1);
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reg[instr->r.rs] = reg[instr->r.r0] + reg[instr->r.r1];
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break;
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case OP_MOVL :
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debug("movl\tr%i #%i\n", instr->i.rs, instr->i.imm);
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reg[instr->r.rs] = (reg[instr->r.rs] & 0xFF00) | instr->i.imm;
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break;
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case OP_MOVH :
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debug("movh\tr%i #%i\n", instr->i.rs, instr->i.imm);
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reg[instr->r.rs] = (reg[instr->r.rs] & 0x00FF) | (((uint16_t) instr->i.imm) << 8);
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break;
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case OP_LW :
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debug("lw\tr%i r%i #%i\n", instr->r.rs, instr->r.r0, instr->r.r1);
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reg[instr->r.rs] = mm_lw(reg[instr->r.r0] + instr->r.r1);
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break;
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case OP_SW :
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debug("sw\tr%i r%i #%i\n", instr->r.rs, instr->r.r0, instr->r.r1);
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mm_sw(reg[instr->r.rs] + instr->r.r1, reg[instr->r.r0]);
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break;
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case OP_JMP :
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debug("jmp\t#%i\n", instr->j.addr);
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cpu_set_pc(instr->j.addr);
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break;
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case OP_JR :
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debug("jr\t#r%i(#%i)\n", instr->i.rs, instr->i.imm);
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break;
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case OP_BEQ :
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debug("beq\tr%i r%i #%i\n", instr->ri.rs, instr->ri.r0, instr->ri.offset);
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// Compare rs, r0
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if (reg[instr->ri.rs] == reg[instr->ri.r0])
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cpu_set_pc(pc + instr->ri.offset);
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break;
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case OP_SYSC_WR :
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debug("I/O write r%i: %i\n", instr->r.rs, reg[instr->r.rs]);
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syscall_write(reg[instr->i.rs], instr->i.imm);
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break;
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default :
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fprintf(stderr, "Invalid instruction (%.2X)\n", instr->opcode);
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cpu_flags |= CPU_FLAGS_HALT;
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break;
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}
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}
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void print_memory() {
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int i = 0;
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printf("\n");
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for(i = 0; i < 32; i++) {
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printf("%.2X ", memory[i]);
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}
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printf("\n");
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}
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static unsigned char* instr_fetch() {
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if (pc + 1 >= instr_cnt >> 1)
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cpu_flags |= CPU_FLAGS_HALT;
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return instr_mem + (pc++ << 1);
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}
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int cpu_instr_load(void *ptr, unsigned len) {
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if (len % 2) {
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fprintf(stderr, "Error: Instruction length must be a multiple of 2\n");
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return -1;
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}
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instr_mem = ptr;
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instr_cnt = len;
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return len;
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}
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void cpu_instr_unload() {
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instr_mem = NULL;
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instr_cnt = 0;
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}
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void cpu_set_pc(uint16_t addr) {
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if (addr > instr_cnt / 2) {
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fprintf(stderr, "Runtime error: Invalid instruction address %ui\n", addr);
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cpu_flags |= CPU_FLAGS_HALT;
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return;
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}
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pc = addr;
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}
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void cpu_run() {
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mm_init();
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cpu_flags &= ~CPU_FLAGS_HALT;
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while(!(cpu_flags & CPU_FLAGS_HALT)) {
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struct instr instr;
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unsigned char* next = instr_fetch();
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// decode instruction.
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instr_decode(next, &instr);
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// Execute it.
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execute(&instr);
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}
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print_memory();
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mm_exit();
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}
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